Webinar : How to measure high resistances and small voltages/currents

Date: Wednesday 4 June 2025
Time: 2am NZST (5 June) | 11:30pm ACST | 9:30pm AWST

As materials-based semiconductor devices continue to shrink and operate at ever-lower signal levels, researchers are finding it more difficult to validate and qualify devices, especially emerging devices made with next-generation nanoscale materials. As part of this scaling evolution, each successive generation of devices must be characterised with reduced voltage, current, and power levels because ever-smaller devices operate at correspondingly lower signal levels.

This webinar will examine a new approach, which enables one to easily and accurately source and measure signals that would otherwise be swamped by electrical noise in some applications.

Lake Shore’s Jason Chonko, the presenter, will discuss:

• How to better perform high-resistance measurements
• New technologies for performing DC and lock-in measurements
• The pros and cons of DC reversal versus AC/lock-in methods
• The importance of input and output impedance in such measurements
• Minimising the effects of parasitic capacitance in your measurement